Description: Optimal VLSI Architectural Synthesis by Catherine H. Gebotys, Mohamed I. Elmasry Estimated delivery 3-12 business days Format Hardcover Condition Brand New Description Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved. Publisher Description Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. This in our view is due to the inability of current architectural synthesizers to provide area-delay competitive (or "optimal") architectures, that will support interfaces to analog, asynchronous, and other complex processes. They also fail to incorporate testability. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved. Traditionally architectural synthesis is viewed as NP hard and there fore most research has involved heuristics. OASIC demonstrates by using an IP approach (using polyhedral analysis), that most input algo rithms can be synthesized very fast into globally optimal architectures. Since a mathematical model is used, complex interface constraints can easily be incorporated and solved. Research in test incorporation has in general been separate from syn thesis research. This is due to the fact that traditional test research has been at the gate or lower level of design representation. Nevertheless as technologies scale down, and complexity of design scales up, the push for reducing testing times is increased. On way to deal with this is to incorporate test strategies early in the design process. The second half of this text examines an approach for integrating architectural synthesis with test incorporation. Research showed that test must be considered during synthesis to provide good architectural solutions which minimize Xlll area delay cost functions. Details ISBN 079239223X ISBN-13 9780792392231 Title Optimal VLSI Architectural Synthesis Author Catherine H. Gebotys, Mohamed I. Elmasry Format Hardcover Year 1991 Pages 289 Edition 1992nd Publisher Springer GE_Item_ID:137674647; About Us Grand Eagle Retail is the ideal place for all your shopping needs! With fast shipping, low prices, friendly service and over 1,000,000 in stock items - you're bound to find what you want, at a price you'll love! Shipping & Delivery Times Shipping is FREE to any address in USA. Please view eBay estimated delivery times at the top of the listing. Deliveries are made by either USPS or Courier. We are unable to deliver faster than stated. International deliveries will take 1-6 weeks. NOTE: We are unable to offer combined shipping for multiple items purchased. This is because our items are shipped from different locations. Returns If you wish to return an item, please consult our Returns Policy as below: Please contact Customer Services and request "Return Authorisation" before you send your item back to us. Unauthorised returns will not be accepted. Returns must be postmarked within 4 business days of authorisation and must be in resellable condition. Returns are shipped at the customer's risk. We cannot take responsibility for items which are lost or damaged in transit. For purchases where a shipping charge was paid, there will be no refund of the original shipping charge. Additional Questions If you have any questions please feel free to Contact Us. Categories Baby Books Electronics Fashion Games Health & Beauty Home, Garden & Pets Movies Music Sports & Outdoors Toys
Price: 190.56 USD
Location: Fairfield, Ohio
End Time: 2024-11-21T03:03:42.000Z
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Restocking Fee: No
Return shipping will be paid by: Buyer
All returns accepted: Returns Accepted
Item must be returned within: 30 Days
Refund will be given as: Money Back
ISBN-13: 9780792392231
Book Title: Optimal VLSI Architectural Synthesis
Number of Pages: Xiv, 289 Pages
Publication Name: Optimal Vlsi Architectural Synthesis : Area, Performance and Testability
Language: English
Publisher: Springer
Publication Year: 1991
Subject: Systems Architecture / General, Cad-Cam, Electronics / Circuits / Vlsi & Ulsi, Electronics / Circuits / General, Electrical
Type: Textbook
Item Weight: 47.3 Oz
Subject Area: Computers, Technology & Engineering
Item Length: 9.3 in
Author: Mohamed I. Elmasry, Catherine H. Gebotys
Series: The Springer International Series in Engineering and Computer Science Ser.
Item Width: 6.1 in
Format: Hardcover
